NEC SX-ACE - Vectorization and Optimization
Overview
In spring 2015, HLRS installed a next generation vector computer, a NEC SX-ACE. The participants learn about the configuration of the NEC SX-ACE system at HLRS and how to use this cluster of vectorizing shared memory nodes. One focus is an introduction in vectorization. More experienced users can learn how to optimize programs based on performance measurements. Additional topics are I/O and the optimization of application programs. The first day presents an introduction to the NEC SX architecture and vectorization. The second day morning is focused on usage aspects and the differences between the predecessor system (NEC SX-9) and the new NEC SX-ACE. The afternoon is dedicated to hands-on sessions.
Separate registration of individual days is possible. Participants are encouraged to prepare their own applications for use in the hands-on session. Participants familiar with SX vector computers may wish to register only for Day 2.
Program
Day 1
9:00 - 9:30 Local registration
9:30 - 13:00 Introduction to the NEC SX architecture and vectorization
13:00 - 14:00 Lunch break
14:00 - 18:00 Introduction to the NEC SX architecture and vectorization (continued, with some hands-on)
Day 2
9:00 - 13:00 SX-ACE: new features, usage at HLRS
13:00 - 14:00 Lunch break
14:00 - 16:30 Hands-on session
Prerequisites
Programming experience in C or Fortran, some knowledge about parallel programming
Teacher
Jens-Olaf Beismann, Holger Berger (NEC)
Handouts
Each participant will get a paper copy of all slides.
Handouts from the previous year are also available as a zip archive: 2015-NEC-SX-ACE-course-handouts.zip
Registration
Deadline
for registration is Apr. 3, 2016 (extended deadline).
Late registrations after the deadline are still possible but maybe with reduced quality of the handouts.
Fee
Members of German universities and public research institutes: none.
Members of other universities and public research institutes: 120 EUR.
Others: 400 EUR.
(includes coffee breaks)
Organization
Travel Information and Accommodation
see our How to find us page.
PRACE PATC and bwHPC-C5
HLRS is part of the Gauss Centre for Supercomputing (GCS), which is one of the six PRACE Advanced Training Centres (PATCs) that started in Feb. 2012.
HLRS is also member of the Baden-Württemberg initiative bwHPC-C5.
This course is provided within the framework of the bwHPC-C5 user support. This course is not part of the PATC curriculum and is not sponsored by the PATC program.
Links
Additional information can be found, e.g., at NEC SX-ACE at HLRS
Local Organizer
Rolf Rabenseifner phone 0711 685 65530, rabenseifner
hlrs.de
Joerg Hertzer phone 0711 685 65932, hertzerhlrs.de